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@dinyy dinyy commented Apr 18, 2025

This PR fixes an issue where the basic instrumentation test was failing for RISCV targets. The generated branch profile did not match the expected output in bolt/test/runtime/RISCV/basic-instrumentation.s
Before the fix, the output contained incomplete branch information and missing critical transitions:

1 __do_global_dtors_aux/1 8 1 __do_global_dtors_aux/1 a 0 1
1 __do_global_dtors_aux/1 16 1 __do_global_dtors_aux/1 18 0 1
1 __do_global_dtors_aux/1 20 1 __do_global_dtors_aux/1 22 0 1
1 __do_global_dtors_aux/1 20 0 [unknown] 0 0 1
0 [unknown] 0 1 _start 0 0 1
0 [unknown] 0 1 load_gp/1 0 0 1
0 [unknown] 0 1 __do_global_dtors_aux/1 0 0 1
0 [unknown] 0 1 frame_dummy/1 0 0 1
0 [unknown] 0 1 main 0 0 1
0 [unknown] 0 1 f 0 0 1

After the fix, the output now correctly shows all expected branch transitions:

1 _start 0 1 load_gp/1 0 0 1
1 _start 1c 1 __libc_start_main@PLT 0 0 1
1 __do_global_dtors_aux/1 8 1 __do_global_dtors_aux/1 a 0 1
1 __do_global_dtors_aux/1 16 1 __do_global_dtors_aux/1 18 0 1
1 __do_global_dtors_aux/1 20 1 __do_global_dtors_aux/1 22 0 1
1 __do_global_dtors_aux/1 22 1 deregister_tm_clones/1 0 0 1
1 frame_dummy/1 0 1 register_tm_clones/1 0 0 1
1 main 4 1 f 0 0 1
1 __do_global_dtors_aux/1 20 0 [unknown] 0 0 1
0 [unknown] 0 1 _start 0 0 1
0 [unknown] 0 1 __do_global_dtors_aux/1 0 0 1
0 [unknown] 0 1 frame_dummy/1 0 0 1
0 [unknown] 0 1 main 0 0 1

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@llvmbot llvmbot added the BOLT label Apr 18, 2025
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llvmbot commented Apr 18, 2025

@llvm/pr-subscribers-backend-risc-v

@llvm/pr-subscribers-bolt

Author: None (dinyy)

Changes

This PR fixes an issue where the basic instrumentation test was failing for RISCV targets. The generated branch profile did not match the expected output in bolt/test/runtime/RISCV/basic-instrumentation.s
Before the fix, the output contained incomplete branch information and missing critical transitions:

> 1 __do_global_dtors_aux/1 8 1 __do_global_dtors_aux/1 a 0 1
1 __do_global_dtors_aux/1 16 1 __do_global_dtors_aux/1 18 0 1
1 __do_global_dtors_aux/1 20 1 __do_global_dtors_aux/1 22 0 1
1 __do_global_dtors_aux/1 20 0 [unknown] 0 0 1
0 [unknown] 0 1 _start 0 0 1
0 [unknown] 0 1 load_gp/1 0 0 1
0 [unknown] 0 1 __do_global_dtors_aux/1 0 0 1
0 [unknown] 0 1 frame_dummy/1 0 0 1
0 [unknown] 0 1 main 0 0 1
0 [unknown] 0 1 f 0 0 1

After the fix, the output now correctly shows all expected branch transitions:

> 1 _start 0 1 load_gp/1 0 0 1
1 _start 1c 1 __libc_start_main@PLT 0 0 1
1 __do_global_dtors_aux/1 8 1 __do_global_dtors_aux/1 a 0 1
1 __do_global_dtors_aux/1 16 1 __do_global_dtors_aux/1 18 0 1
1 __do_global_dtors_aux/1 20 1 __do_global_dtors_aux/1 22 0 1
1 __do_global_dtors_aux/1 22 1 deregister_tm_clones/1 0 0 1
1 frame_dummy/1 0 1 register_tm_clones/1 0 0 1
1 main 4 1 f 0 0 1
1 __do_global_dtors_aux/1 20 0 [unknown] 0 0 1
0 [unknown] 0 1 _start 0 0 1
0 [unknown] 0 1 __do_global_dtors_aux/1 0 0 1
0 [unknown] 0 1 frame_dummy/1 0 0 1
0 [unknown] 0 1 main 0 0 1


Full diff: https://github.com/llvm/llvm-project/pull/136231.diff

1 Files Affected:

  • (modified) bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp (+2)
diff --git a/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp b/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
index 0e27d29019e95..b6976e606cf51 100644
--- a/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
+++ b/bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
@@ -322,6 +322,8 @@ class RISCVMCPlusBuilder : public MCPlusBuilder {
     default:
       return false;
     case RISCV::C_J:
+    case RISCV::PseudoCALL:
+    case RISCV::PseudoTAIL:
       OpNum = 0;
       return true;
     case RISCV::AUIPC:

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WangJee commented Apr 18, 2025

@dinyy @maksfb with this fix, we may encounter some profile validation errors. Although the profile data is correct, it is still considered invalid. I fix it in #136278

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3 participants